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R&D Engineer Ill
Ref No.: 18-08273
Location: Mountain View, California
Role: R& D Engineer III
Duration: 6+ months
Roles and Responsibilities
  • Successful candidate is expected to:Develop micro-architecture specification for assigned parts of the design.
  • Implement the RTL code in verilog.
  • Collaborate with verification team to develop test plan and test bench to achieve functional closure.
  • Analyze and optimize design to achieve performance, speed, size and power goals.
  • Must have BS or MS in EE/CS with 10+ years of digial experience, preferably in processor design.
  • The individual should have strong background in processor architectures.
  • Knowledge and understanding of instruction set architectures.
  • Working experience in progamming at assembly and C/C++level is a plus.