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Silicon Validation Engineer
Ref No.: 17-05139
Location: Hillsboro, Oregon
Position Type:Contract
Key Qualifications
• Exposures to post-Silicon validation, silicon bringup, testing/debug/root cause of circuit marginalities, product engineering, foundry manufacturing, etc.
• Understanding test execution through both functional mode and DFX hooks.
• Familiarity with ARM and ARC debuggers (DStream, Lauterbauch) preferred.
• Comfortable working primarily in a lab environment with designers, software engineers.
• Strong scripting skills in one of the major languages: eg. Perl, python, Tcl, bash
• Good experimental technique, techniques of problem localization and root-cause
• System level understanding of CPU/SoC architecture, Memories (DDR, NAND), Flash, I2C
• Good data analysis skills and attention to details

Nice-to-haves (in at least two and preferably several):
• Chip design background in circuit/physical design (timing closure, power, etc.) or DV (correlating SW signatures to block level tests).
• Post silicon physical debug background in speed-path/Vmin, memory arrays, clocking or yield improvements.
• Post silicon logic debug background in exercising various DFX features, analyzing scandump/memdump, suggesting tests in both system level or to DV
• Good understanding of boot process, boot-loaders, embedded software, micro-kernel and able to tweak system tests.
• Product engineering background and familiarity with ATE coverage, margin, binning, scan pattern generation, etc.
• Good IP knowledge in some PHY blocks (eg. DDR, PCIe, Mipi PHY etc)

In this role, you will own and execute on the post silicon validation and characterization test plans across Process, Voltage and Temperature (PVT), debug various issues encountered along the way (setup artifacts, test code, logic bugs, physical design debugs, etc. Tasks will include:
Understanding new chip features and define coverage applicable to our test environment
Executing a validation test (run screen or regression) on large volume and analyze results (pass/failure/artifacts/surprises/etc.)
Be the first line of defense when failure occurs to isolate (setup, code, artifacts, silicon issues, logic/physical, identify blocks, etc.).
Once isolated, working with domain experts to define debugs and come up with a root cause. Assisting in driving a fix.
Maintain and create automation scripts/flows for self consumption as well as others.
Able to summarize debugs/findings and think along the line of improvements in both DFX features and test coverage.