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Engineer Circuit Design 4
Ref No.: 18-03403
Location: Manhattan Beach, California
Start Date: 05/11/2018


Shift Start Time: 8:00:00 AM
First Day Shift Start Time: 7:00:00 AM
Shift End Time: 5:00:00 PM
Specific Questions
Question 1: Holds a Bachelors in Science, Masters, or PhD? MUST
Question 2: Have 9 Years relevant experience with Bachelors in Science; 7 Years with Masters; 4 Years with PhD? MUST
Question 3: Is proficient with developing Xilinx FPGAs in a Vivado design environment? MUST
Question 4: Is proficient with developing Xilinx FPGAs using VHDL coding? MUST
Question 5: Have an effective written and verbal communication skills and must be able to clearly present technical approaches and summaries? MUST
Assignment
Sector: IS # of Openings: 1
Category: Eng Filled Positions: 0
Region: CA-California Duration: 1 year
City: Manhattan Beach Clearance: None
Department: Client Job Title: Engineer Circuit Design 4
Keywords: FPGA Developer, Xilinx FPGAs, Vivado Design, VHDL Coding
Responsibilities: The Ground Systems Development department is seeking FPGA developers who are familiar with the Xilinx Vivado FPGA design environment. The primary assignment is to update existing digital demodulation VHDL for a new amplitude/phase shift key modulated, multi-gigabit, waveform. Developers will also integrate and test their code in a hardware lab environment using arbitrary waveform generators, various signal analyzers and bit error rate testers. Candidates will have effective written and verbal communication skills and must be able to clearly present technical approaches and summaries. Candidates must be able to work with without appreciable direction. HOURS: 9/80 workweek
Requirements: Must have 9 Years relevant experience with Bachelors in Science; 7 Years with Masters; 4 Years with PhD. Demonstrated proficiency developing Xilinx FPGAs in a Vivado design environment. Demonstrated proficiency developing Xilinx FPGAs using VHDL coding. Preferred Qualifications: Experience designing high speed FPGAs. Experience developing digital signal processing algorithms for bandwidth efficient digital demodulation. Experience testing and integration high speed modems.
Education: Bachelors in Science, Masters, or PhD.