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ASIC Verification Engineer
Ref No.: 18-48223
Location: San Jose, California
Position Type:Contract
Start Date: 07/11/2018
Job Description:
Experienced in Verilog and OOPs• Readily available• Need people with hands on code experience • Around the 3-6 year experience level ideal Spec : Must have: · At least 3 years of hands-on relevant experience with pre-silicon verification· Must be a quick learner, independent and communicate well. Good logical and analytical skills.· Knowledge and hands on experience with Verilog, System Verilog· Must be proficient with :o OOPs o Classes, randomization, constraints, interfaces o building a test bench for a medium complexity block o writing & analyzing functional coverage, assertions o Generating and analyzing code coverage & writing waivers o Writing random tests, directed tests, error tests & performance tests for a block of medium complexity o Debug skills – able to isolate failures to environment, test or design.