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Graphics Design Engineer
Ref No.: 20-02872
Location: Menlo Park, California
This is an excellent opportunity to join the world's largest social media network who enables over a billion users to openly connect with friends and family, share content, and explore the world.

Graphics Design Engineer
AR/VR Platform Hardware
Menlo Park CA or Redmond, WA, USA


Reality Labs, or FRL, focuses on delivering Facebook's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Facebook Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware, and algorithms.

We are currently seeking a graphics silicon design engineer to support the development of a custom graphics pipeline optimised for AR/VR systems. The successful candidate will be required to design RTL for algorithms used for generating or re-projecting graphic images.

Key Responsibilities
  • Design RTL silicon modules used in graphics pipeline.
  • Collaborate closely with the graphics architects, firmware engineers and the SoC designers to support the realisation of the necessary hardware to enable innovative AR/VR experiences
  • Support all phases of Silicon SoC development from a graphics pipeline perspective - from early definition on through specification, architecture, layout and production

Minimum Qualifications
  • 5+ years of experience in silicon RTL design for ASIC's.
  • Ability to evaluate adesign tradeoffs in speed, performance, power, area
  • BS EE/CS or equivalent in relevant areas

Preferred Qualifications
  • Experience with GPU hardware architectures or graphics pipeline
  • Preferred experience in building GPU algoriths using machine learning
  • Ability to operate autonomously, with only high-level direction
  • Top down high-level-model to HW mapping
  • Knowledge of industry trends and disruptive technologies
  • Experience working with hardware and/or FPGA systems.