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Physical Design Engineer
Ref No.: 20-00591
Location: Menlo Park, California
Physical Design Engineer​
Location: Menlo Park, Ca
Duration: Through 2/2021
Company: A leader in the Social Media Networking company

Responsibilities:
Develop and own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes.Resolve design and flow issues related to physical design, identify potential solutions, and drive executionDeliver physical design of an end-to-end IPSkills:

Required Skills:
5 years of relevant physical design experience
Synthesis and timing closures for ASIC deliverables in sub-15 nm geometries with very low power targets.
Tools such as Synopsys Design Compiler (DC).

Desired Skills:
FPGA synthesis and timing tools are a plus here, as well, but not a substitute for ASIC flow.
Scripting language experience including Python and TCL. Other languages are a plus.
XFN Collaboration with all teams to complete ASIC deliverable flows e.g. design, verification, power, performance, physical design, program management, etc.