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Senior FPGA/ASIC Verification Engineer
Ref No.: 20-00196
Location: Brampton, Ontario
Consultant - Senior FPGA/ASIC Verification Engineer
Ottawa, Ontorio
6+ Months



Position Summary
This position is located in Ottawa, Ontario,  The successful candidate's primary responsibility will be verification of FPGA designs for new multi-standard radio base station products for 5G, LTE, W-CDMA, and GSM networks.  The position may also involve modeling, RTL design, in-system lab bring up and testing, and other typical aspects of FPGA and/or ASIC development.  The Ottawa team works very closely with other Radio development teams located in Sweden and China.
Candidates should have a minimum of 10 years of experience specializing in FPGA/ASIC Verification, using modern methodologies.
 
Responsibilities & Tasks:
  • Defining FPGA/ASIC verification strategies and specifications.
  • Architecting and implementing verification environments and VIPs from scratch, and corresponding test suites, using modern verification techniques, e.g. SystemVerilog, UVM, and/or Assertion Based Verification.
  • Defining functional and code coverage requirements, and measuring and driving closure to targets.
  • Communicating and documenting results in verification reports.
  • Collaborating with the Hardware, Software, Systems, and Integration teams, to understand requirements and specifications and drive optimal implementations with low defect rates.
  • Directing the work of, and mentoring, other FPGA Verification Engineers.
  • Contributing to the continuous improvement of products, simulation tools and processes.
 
Position Qualifications:
  • Proven ability in assessing a project and independently determining appropriate and comprehensive FPGA/ASIC verification strategies.
  • Expert level knowledge of SystemVerilog, UVM/OVM, SVA, and simulators from major vendors.
  • Familiarity with modern FPGA device families and tools.
  • Skilled with scripting languages and tools (TCL, Python, Perl, Make).
  • Knowledge of high speed serial links and protocols, including Ethernet, CPRI, and JESD204B/C.
  • Knowledge of Digital Signal Processing, DSP modeling, hardware realizations, and bit-exact verification techniques.
  • Analytical mindset, high capacity, results oriented and the ability to deliver under pressure.
  • Excellent English verbal and written communication skills.
  • A highly motivated self-starter, able to work independently, while being a team player.
  • Bachelor's degree in Electrical or Computer Engineering, with demonstrated experience and knowledge in the above mentioned required skills areas.
 
Additional Assets:
  • Basic knowledge of wireless systems and 3GPP specifications.
  • Mathematical analysis skills using Matlab or similar.
  • Experience in RTL design targeting FPGAs using SystemVerilog/Verilog/VHDL.
  • SW OO Programming.