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FPGA Design Engineer
Ref No.: 18-00274
Location: Sunnyvale, California
Position Type:Regular FTE/Contractor
Start Date: 03/21/2018
2 FPGA Engineers; under: Vikas Gokhale Both have the same job description as the contractor position. Contract position under Shuguang Yang


Socionext Inc. (SNI) is a new, innovative enterprise that designs, develops and delivers System-on-Chip products to customers worldwide. The company is focused on imaging, networking, server and other dynamic technologies that drive today's leading-edge applications. Socionext combines world-class expertise, experience, and an extensive IP portfolio to provide exceptional solutions and ensure a better quality of experience for customers. Founded in 2015, Socionext Inc. is headquartered in Yokohama, and has offices in Japan, Asia, United States and Europe to lead its product development and sales activities. Socionext America Inc. (SNA), a wholly owned subsidiary of SNI.

We are seeking a FPGA Design Engineer for the Custom SoC team in our Sunnyvale, CA location.


Develop FPGA designs and subsystems (involving ASICs), from concept to product including:
  • Completing implementation in RTL and evaluating Xilinx Vivado synthesis and P&R results for performance and cost
  • Ensuring robust and complete timing constraints and evaluating STA results.
  • Balancing performance, area, power, complexity and timing
  • Determining and executing development, integration, bringup and test plans.
  • Working closely with firmware and verification teams during specification, development, Integration and Verification phases and deliver working FPGA platforms
  • Interfacing to third-party IP
Minimum Qualifications:
  • BS or MS in Electrical Engineering.
  • 7+ years of FPGA design experience.
  • 5+ years of RTL Development using Verilog, System Verilog, VHDL
  • Experience developing/using UVM, VIPs, AVIPs.
  • Demonstrated experience working on FPGA Design projects, including work with SOC (ARM CPU based) & Sub Components of XAUI, USB, Flash, SDIO, PCI-E, and DDR Interfaces.
  • Familiarity with Synopsys and Xilinx tools for FPGA Design and implementation.
  • Strong coding, debugging skills on both UVM and FPGA Platforms
  • Hands on experience with Testers & Scope.
  • Proven expertise in one or more of the following domains: high speed ARM interconnect or memory subsystems such as CCI, AXI, ACE, AHB and APB
  • Prior Experience with A53, A72, A73 ARM cores and Architecture
  • Familiarity with revision control concepts and tools (e.g. Subversion)
  • Experience with Perl, Tcl, Python, Unix scripting.
  • Teamwork, dedication, strong communications and interpersonal skills
  • Excellent written and oral communication skills
  • Self starter, driven and motivated to work under strict timelines with a "can do” attitude

Preferred qualifications:
  • Experience with MIPI, PCIe, USB 3.1, LPDDR4 Interface is a plus.
  • Experience with S2C or HAPS platform is a plus.
  • Good knowledge of embedded camera system and CMOS imaging sensor devices.
  • Familiarity with MIPI – C /D PHY & have Prior experience with Image Sensors & be able to Tune & bring up different Types of Sensors.

  • Who will this person report to? Shuguang Yang
  • Travel Involved? No plans yet. But may be a remote chance on a need basis.
  • What teams would this person work most closely with? This person will work with all project teams for both FPGA Boards as well as Reference Boards
  • Is there any direct client interfacing? Yes
  • Will this person talk to our clients at all? Yes.
  • What kinds of deliverables will this person be responsible for? RTL Design and working FPGA platforms.
  • Will this person manage anybody or any teams? no
  • Or, is it an individual contributor role? yes.